vestigia-0.2.0: Where an execution depended on a secret.
Copyright(c) 2026 Jared Tobin
LicenseMIT
MaintainerJared Tobin <jared@ppad.tech>
Safe HaskellSafe-Inferred
LanguageHaskell2010

Vestigia.Contract

Description

An ISA's data-independent-timing contract, and what it makes of each instruction of an object: one it covers takes a time independent of its data; one it does not, run on operands that depend on the secret, is outside the contract; and a division is variable-time on either ISA. Control flow and system instructions are left to the comparison of what ran.

An object is read through LLVM's disassembler (llvm-objdump), in Intel syntax on x86_64. On AArch64 an instruction is matched by its encoding against Arm's own (Arm), its source registers read off the fields the encoding names. On x86_64 it is matched by its mnemonic and opcode byte against Intel's list (Intel), its source registers read off its operands: every register operand outside a memory reference, but the first where the instruction only writes it, and the registers some instructions read without naming.

What is outside the contract and reads data becomes the watch list the QEMU plugin is given: each such instruction, by its address in its object, with the registers to fingerprint before it runs, as the plugin fingerprints a division's operands.

Synopsis

Documentation

data Contract Source #

A data-independent-timing contract: Arm's PSTATE.DIT, or Intel's DOITM.

Constructors

ArmDit 
IntelDoitm 

Instances

Instances details
Show Contract Source # 
Instance details

Defined in Vestigia.Contract

Eq Contract Source # 
Instance details

Defined in Vestigia.Contract

contractSource :: Contract -> Text Source #

The release of the vendor's own statement the table transcribes.

contractIsa :: Contract -> String Source #

The ISA a contract speaks to, as QEMU names it.

data Line Source #

One instruction as the disassembler prints it: its address in the object, its raw form (an AArch64 word, or x86_64's bytes), any prefixes, its mnemonic, and its operands.

Constructors

Line 

Instances

Instances details
Show Line Source # 
Instance details

Defined in Vestigia.Contract

Methods

showsPrec :: Int -> Line -> ShowS #

show :: Line -> String #

showList :: [Line] -> ShowS #

Eq Line Source # 
Instance details

Defined in Vestigia.Contract

Methods

(==) :: Line -> Line -> Bool #

(/=) :: Line -> Line -> Bool #

readDisassembly :: Text -> [Line] Source #

The instructions of llvm-objdump's disassembly; everything else it prints (headers, symbols, elided runs) is passed over.

data Register Source #

A register to fingerprint, as QEMU names it, by the bits read: from its low bit, so many of them.

Constructors

Register 

Fields

Instances

Instances details
Show Register Source # 
Instance details

Defined in Vestigia.Contract

Eq Register Source # 
Instance details

Defined in Vestigia.Contract

Ord Register Source # 
Instance details

Defined in Vestigia.Contract

data Verdict Source #

What a contract makes of an instruction: covered by it; control flow or system, or reading no data; an integer division, which the plugin reads for itself; or outside the contract, with the registers it reads and whether it names memory.

Instances

Instances details
Show Verdict Source # 
Instance details

Defined in Vestigia.Contract

Eq Verdict Source # 
Instance details

Defined in Vestigia.Contract

Methods

(==) :: Verdict -> Verdict -> Bool #

(/=) :: Verdict -> Verdict -> Bool #

classify :: Contract -> Line -> Verdict Source #

Classify one instruction under a contract.

watchSection :: Contract -> FilePath -> [Line] -> Text Source #

The plugin's watch list for one object, at its path: an O line naming it, then a D line per division and a U line per instruction outside the contract, each with its address and its text (a U line with whether it names memory and the registers it reads, each as name:low:width, before the text).